Answer:
http://www.hackshop.org/levels/basic-arduino/hack-the-chromebook
Explanation:
yes
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yes
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Answer:
10.b
11.c
12.c
13.a
14.d
15.b
16.c
Explanation:
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Suppose a byte-addressable computer using set-associative cache has 2 16 bytes of main memory and a cache size of 32 blocks and each cache block contains 8 bytes. a) If this cache is 2-way set associative, what is the format of a memory address as seen by the cache; that is, what are the size of the tag, set, and offset fields
Answer:
Following are the responses to these question:
Explanation:
The cache size is 2n words whenever the address bit number is n then So, because cache size is 216 words, its number of address bits required for that cache is 16 because the recollection is relational 2, there is 2 type for each set. Its cache has 32 blocks, so overall sets are as follows:
[tex]\text{Total Number of sets raluired}= \frac{\text{Number of blocks}}{Associativity}[/tex]
[tex]=\frac{32}{2}\\\\ =16\\\\= 2^4 \ sets[/tex]
The set bits required also are 4. Therefore.
Every other block has 8 words, 23 words, so the field of the word requires 3 bits.
For both the tag field, the remaining portion bits are essential. The bytes in the tag field are calculated as follows:
Bits number in the field tag =Address Bits Total number-Set bits number number-Number of bits of words
=16-4-3
= 9 bit
The number of bits inside the individual fields is therefore as follows:
Tag field: 8 bits Tag field
Fieldset: 4 bits
Field Word:3 bits